National Conference on Innovation in Open-Source Circuits (CISC)

Empowering Hardware Design through Open-Source Innovation

ECHO (Electronics and Communication Heuristics Organization), the student association of the Department of Electronics and Communication Engineering at Federal Institute of Science and Technology (FISAT), in association with the Centre for Collaborative Research in Robotics and AI and the e-Yantra Project, IIT Bombay, proudly organizes the National Conference on Innovation in Open-Source Circuits (CISC)

September 18th,19th & 20th of 2025 (Hybrid Mode)


Submit Paper Important Notice

About CISC 2025

CISC 2025 aims to bring together researchers, students, academicians, and industry professionals to explore and promote open-source software tools and platforms in hardware design. The conference highlights the paradigm shift towards transparency, collaboration, and cost-effectiveness in circuit and system design through the use of open technologies.

The event will feature paper presentations, keynote talks, and technical workshops focusing on open-source ecosystems driving innovation in hardware.

Important Notice

Secure your participation and join us for an inspiring conference experience!

Proceed

Key Tracks

We invite innovative contributions using Open-Source Software in the following areas:

Digital Systems and FPGA
IoT and Embedded systems
Robotics and Control
Communication Systems
Artificial Intelligence/Machine Learning
Signal Processing

Call for papers

We invite original research papers and project demos from students in the above-mentioned tracks. Selected papers will be published in the conference proceedings with ISBN.

Submission Guidelines

Submit your papers through Microsoft CMT*:
Submit via Microsoft CMT
Paper Template:

Authors must use the standard conference template for paper submission:

Download Paper Template
Submission Guidelines:
  • Papers should be in English and should have 6-12 pages.
  • All submissions must be in PDF format
  • Submissions will be peer-reviewed by the technical program committee
*The Microsoft CMT service was used for managing the peer-reviewing process for this conference. This service was provided for free by Microsoft and they bore all expenses, including costs for Azure cloud services as well as for software development and support.

Technical Competition

Competition 1

Robotrail (Line Follower Robot Competition):

Date: 19th September 2025

Team Size: Individual or 2 members

Prize: 10K/-

Compete in a thrilling line-following robot challenge and demonstrate your robotics expertise.


Workshops

Note: If the payment doesn't go through, please try again after 24 hours or contact the organizing committee for assistance.

One Day Drone Development Workshop

Join our exclusive one-day training program and dive into the world of drone technology. This workshop is designed to give you a complete overview of drones – from theory to real-time flying experience.

  • Introduction to drone technology
  • Build technical and regulatory knowledge essential for drone projects
  • Hybrid Operations, Aerodynamics, and Firmware Programming
Goal: Comprehensive understanding of drone technology and its applications
Registration Closed
Silicon Secrets: Reverse Engineering Embedded Systems

Crack open the black box—learn how to tear down binaries, extract secrets, and expose what your devices don’t want you to know. Whether you’re a beginner or a seasoned enthusiast, this workshop will ignite your curiosity and empower you to push the boundaries of embedded systems security.

  • Learn binary analysis techniques
  • Understand firmware architectures
  • Explore reverse engineering tools
Goal: Hands-on experience in reverse engineering embedded systems
Registration Closed
One-Day FPGA Design Flow using Vivado Workshop

Step into the world of digital design with our exclusive one-day FPGA design workshop using AMD Vivado Design Suite. This intensive program introduces you to modern FPGA workflows—covering theory, design, simulation, synthesis, and hardware debugging.

  • Vivado Design Flow: Create and simulate HDL designs, generate bitstream, and verify in hardware
  • RTL Design Synthesis with different settings and observation
  • Design Implementation: Timing analysis, bitstream generation, and functionality verification
Goal: Gain a solid foundation in FPGA design flow, equipping you with the skills to design, implement, and debug digital systems on AMD devices.
Registration Closed
Introduction to Embedded Systems and Robotics

Organized by e-Yantra, IIT Bombay. e-Yantra is an initiative of Indian Institute of Technology Bombay (IIT Bombay) at the Department of Computer Science and Engineering (CSE) to spread Embedded systems and Robotics education across Schools and Colleges world-wide.

  • Introduction to embedded systems
  • Basics of robotics
  • Hands-on projects and applications
  • 2-Day Workshop
Goal: Practical understanding of embedded systems and robotics
Registration Closed

Registration

Registration Fees

Category Fee
Paper Presenters (Student) ₹350/-
Workshop (Per Session) ₹400/-
Robotrail Competition (Per Team) ₹400/-

Author registeration form will be send as email.

Advisory Members

Mr. Shimith P R

Chairman, FISAT

Dr. Jacob Thomas V, PhD

Principal, FISAT

Dr. Mini P R, PhD

Vice-Principal, FISAT

Dr. Unni Kartha G, PhD

Dean, Academics, FISAT

Dr. Bejoy Varghese, PhD

HoD, ECE Department, FISAT

Executive Committee

Ms. Dhanya S

Assistant Professor, ECE Department, FISAT

Ms. Leena Thomas

Assistant Professor, ECE Department, FISAT

Ms. Subha Thomas

Assistant Professor, ECE Department, FISAT

Ms. Neena K.A.

Assistant Professor, ECE Department, FISAT

Nekha Ramesh

Joint Secretary, ECHO

Peter Francis

Technical Team Lead, ECHO

Contact Us

CISC-2025

Department of Electronics and Communication Engineering

Federal Institute of Science and Technology (FISAT)

cisc2025@fisat.ac.in

0484-2725272

Conference Venue

Federal Institute of Science and Technology (FISAT)

Mookkannoor, Angamaly, Kerala - 683577