National Conference on Innovation in Open-Source Circuits (CISC)

Empowering Hardware Design through Open-Source Innovation

ECHO (Electronics and Communication Heuristics Organization), the student association of the Department of Electronics and Communication Engineering at Federal Institute of Science and Technology (FISAT), in association with the Centre for Collaborative Research in Robotics and AI and the e-Yantra Project, IIT Bombay, proudly organizes the National Conference on Innovation in Open-Source Circuits (CISC)

September 18th,19th & 20th of 2025

Submit Paper Registration Details

About CISC 2025

CISC 2025 aims to bring together researchers, students, academicians, and industry professionals to explore and promote open-source software tools and platforms in hardware design. The conference highlights the paradigm shift towards transparency, collaboration, and cost-effectiveness in circuit and system design through the use of open technologies.

The event will feature paper presentations, keynote talks, and technical workshops focusing on open-source ecosystems driving innovation in hardware.

Key Tracks

We invite original, unpublished research papers and project demonstrations on the following areas:

Open-Source EDA Tools
RISC-V Architecture & Custom SoC Design
FPGA Development using Open Toolchains
Hardware-Software Co-Design with Open Frameworks
AI/ML Acceleration in Hardware via Open Platforms
IoT and Embedded Systems using Open-Source Tools

Call for papers

We invite original research papers and project demos from students in the above-mentioned tracks. Selected papers will be published in the conference proceedings with ISBN.

Submission Guidelines

Submit your papers through Microsoft CMT*:
Submit via Microsoft CMT
Paper Template:

Authors must use the standard conference template for paper submission:

Download Paper Template
Submission Guidelines:
  • Papers should be in English and should have 6-12 pages.
  • All submissions must be in PDF format
  • Submissions will be peer-reviewed by the technical program committee
*The Microsoft CMT service was used for managing the peer-reviewing process for this conference. This service was provided for free by Microsoft and they bore all expenses, including costs for Azure cloud services as well as for software development and support.

Workshops

To Be Announced Soon!

Important Notes

Paper Submission Deadline

September 8th, 2025

Prize Pool For Best Paper Presentation

10K

Conference Dates

September 18th,19th, & 20th of 2025

Prize Pool For Thinkspire and Robotrail

10K Each

Number Of Participants Per Team For Thinkspire and Robotrail

2 Members Max

Registration

Registration Fees

Category Fee
Paper Presenters (Student) ₹350/-
Workshop (Per Session) ₹400/-
Robotrail Competition (Per Team) ₹400/-
Thinkspire Competition (Per Team) ₹400/-

Author registeration form will be send as email.

Advisory Members

Mr. Shimith P R

Chairman, FISAT

Dr. Jacob Thomas V, PhD

Principal, FISAT

Dr. Mini P R, PhD

Vice-Principal, FISAT

Dr. Unni Kartha G, PhD

Dean, Academics, FISAT

Dr. Bejoy Varghese, PhD

HoD, ECE Department, FISAT

Executive Committee

Ms. Dhanya S

Assistant Professor, ECE Department, FISAT

Ms. Leena Thomas

Assistant Professor, ECE Department, FISAT

Ms. Subha Thomas

Assistant Professor, ECE Department, FISAT

Ms. Neena K.A.

Assistant Professor, ECE Department, FISAT

Contact Us

CISC-2025

Department of Electronics and Communication Engineering

Federal Institute of Science and Technology (FISAT)

cisc2025@fisat.ac.in

0484-2725272

Conference Venue

Federal Institute of Science and Technology (FISAT)

Mookkannoor, Angamaly, Kerala - 683577